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? data device corporation 105 wilbur place bohemia, new york 11716 631-567-5600 fax: 631-567-7358 www.ddc-web.com for more information contact: technical support: 1-800-ddc-5757 ext. 7771 features ? includes four rd-19230 converters software programmable: resolution (10, 12, 14, or 16 bit) and bandwidth (low: 15/45 hz, high: 100/300 hz) input amplitude: 2 v rms( l-l ) , 11.8 v rms( l-l ) , or 90 v rms( l-l ) optional two channels of digital-to- synchro/resolver conversion dynamic rotation two-speed measurement and simulation on-board programmable oscillator with optional 1.5 va drive dll?s and libraries for windows? 9x/2000/xp, windows nt?, linux, and labview?, ( datasims support) 0 to 70 c standard operating temperature velocity output output amplitudes: 11.8 v rms( l-l ) synchro, 11.8 v rms( l-l ) resolver, 2 v rms( l-l ) direct output voltages can be scaled lower a quad b encoder emulation description the sb-36200ix is a pci bus card that contains four channels of fully independent synchro/resolver-to-digital (s/r-d) conversion and up to two channels of digital-to-synchro/resolver (d-s/r) conversion. the sb-36200ix card has an on-board programmable oscillator to support voltage ranges of 3.4 vrms, 26 vrms or 115 vrms from 57 to 7khz (see ordering information for range and output drive selec- tions). synchro/resolver-to-digital the resolution (10, 12, 14 or 16 bit) and bandwidth low (15 hz/45 hz) or high (100 hz/300 hz) are software programmable. each channel has an independent signal and reference input. the standard inputs are solid state. the signal connections are provided through a 68-pin mini d-type connector (p1). digital-to-synchro/resolver the sb-36200ix pci card has up to two channels of fully independ- ent digital-to-synchro or digital-to-resolver conversion. for each channel the conversion process is implemented using ddc d/s or d/r converters dsc-11520, dsc-11524 or dr-11525 (see hybrid data sheets for output characteristics). applications the sb-36200ix has been designed for modern, high performance industrial and military position feedback, control, and test systems. typical motion feedback applications include motor control, machine tool control, antenna control, robotics, and process control systems. the sb- 36200ix is supplied with a windows gui which creates a simple graphi- cal interface to analyze or simulate position information, direction and bit. ? 2001 data device corporation sb-36200ix combination s/r-to-digital and digital-to-s/r pci bus converter card make sure the next card you purchase has...
2 data device corporation www.ddc-web.com sb-36200ix j-11/05-0 figure 1. sb-36200ix block diagram channels 1- 2 channels 1- 4 rh out rl out s1 s2 s3 s4 rh rl s1 s2 s3 s4 rh rl p1 input scaling sin cos rh rl rd-19230 monolithic resolver digital converter reference scaling s1 s2 rh rl d/s or d/r amplifier oscillator internal register address decoder thin-film resistor network pci bus address data (optional) s3 s4 hybrid converter -to- a b zip vel output input output channels 1- 4 transformer (optional)
3 data device corporation www.ddc-web.com sb-36200ix j-11/05-0 value parameter unit table 1. sb-36200ix specifications (per channel) these specifications apply over the rated power supply, temperature, and reference frequency ranges; 10% signal amplitude variation and 10% harmonic distortion. resolution oscillator carrier frequency voltage range drive signal input (s/r-d) (synchro type) zin line-to-line zin each line-to-ground (resolver type) zin single ended zin differential common-mode range r/d reference input voltage range input impedance single ended differential power supply (note 5) voltage s/r-d current d-s/r current temperature range operating (sb-3620xix-3xx) storage physical characteristics in. (mm.) 7.7 x 4.2 x 0.91 (195.6 x 106.7 x 23.1) c c 0 to +70 -40 to +85 vdc amax amax +5 0.5 with oscillator, no load, 4 channels (worst case) 1.3 with oscillator, no load, 2 channels (worst case) vrms l-l ohms ohms vrms l-l ohms ohms v vrms vrms kohms kohms 4.4 2 - 40 200 400 11.8 52k 35k 11.8 70k 140k 30 max. 90 195k 130k ? ? ? ? ? ? ? 2v rms direct 10m || 20pf (note 1) n/a n/a hz vrms ma. max 360 - 7k 0 - 3.4 300 360 - 7k 0 - 26 60 57 - 440 0 - 115 13 bits 10, 12, 14, or 16 programmable (option x) (option a) notes: 1. || = ?in parallel with.? 2. if the frequency is between 47 and 1 khz, then there will be 1 lsb jitter in the s/r-d. 3. reference input voltage to d-s/r converter must be 90/26/4.4 vrms prorated output. 4. see specific converter data sheets for further specifications. 5. requires a 5v pci card slot, will not operate on a 3.3v pci slot. solid state (option b) accuracy (s/r-d) rd-19230 (1 min + 1 lsb) accuracy (d-s/r) dsc-11520-305 dr-11525-305 dsc-11524-304 minutes minutes minutes minutes 47 -1k (note 2) 1k - 4k 4k - 7k 1 + 1 lsb 1 1 2 1 + 1 lsb 2 + 1 lsb input frequency digital inputs (d-s/r) logic type natural binary angle, parallel positive logic cmos and ttl compatible. inputs are cmos transient protected. logic 0 = 0 to +1 v logic 1 = 2.2 v to +5 v 20 max to gnd (bits 1 - 16) 20 max to +5 v (/ll, /lm, /la) (see timing diagrams in d-s/r data sheets) a a table 1. sb-36200ix specifications (cont.) (per channel) these specifications apply over the rated power supply, temperature, and reference frequency ranges; 10% signal amplitude variation and 10% harmonic distortion. value parameter unit 26 12 - 40 100 200 115 62 - 130 600 1200 d - s/r drive dsc-11520 dsc-11524 dr-11525 ma(rms) ma(rms) ma(rms) 2 max 15 max 2 max dynamic rotation rps min/max at 12 bit resolution (0.03 to 2014) at 16 bit resolution (0.05 to 125) digital outputs (s/r-d) a, b, zero index pulse(zip) drive capability after set into a quad mode 50 pf+ logic 0: 1 ttl load, 1.6 ma at 0.4 v max. logic 1: 10 ttl loads, -0.4 ma at 2.8 v min. logic 0: 100 mv max. driving cmos logic 1: +5 v supply minus 100mv min. dr iving cmos d/r reference input (note 3) input impedance single ended differential vrms kohms kohms 4.4 45 90 26 25 50 115 125 250 type 60 hz nominal table 2. dynamic characteristics (s/r-d) resolution (bits) 10 400 hz nominal bandwidth (hz) * tracking rate (rps) 32 scale factor (volts/rps) .125 45 low high 12 * 8 .5 14 15 2 2 ** 16 .5 8 ** 10 * 320 .0125 300 12 * 80 .05 14 100 20 .2 ** 16 5 .8 ** * not recommended - low bandwidths in low resolutions may induce spin around and the part will not settle. **high bandwidths in high resolutions may be used with carrier frequencies above 1.5 khz. parameter units table 3. velocity characteristics (s/r-d) polarity voltage range v max. / min. voltage scaling (resolution dependent) volts/rps scale factor error scale factor tc reversal error linearity zero offset zero offset tc load % ppm / deg c % % output mv uv / deg c k ohms 4.0 typical tracking rate (see table 2) 10 100 1 0.5 5 15 20 (max.) 200 (max.) 2 (max.) 1 (max.) 15 (max.) 30 (max.) 10 (min.) typical for frequencies higher than 1 khz use the dr-11525 and refer to the converter data sheet specifications.
4 data device corporation www.ddc-web.com sb-36200ix j-11/05-0 synthesized reference the rd-19230 input converters contain a synthesized reference, which eliminates errors due to phase shift between the reference and the signal inputs up to 45. quadrature voltages in a resolver or synchro are by definition the resulting 90 fundamental signal in the nulled out error voltage (e) in the converter. due to the inductive nature of resolvers and synchros, their output signals lead the reference input signal (rh and rl). when an uncom- pensated reference signal is used to demodulate the control transformer?s output, quadrature voltages are not completely eliminated. therefore this is the perfect solution to combat phase shift error to 45. built-in-test built-in-test (bit) will flag loss-of-signal (los) and loss-of- reference (lor) fault conditions. also, excessive error is detect- ed by monitoring the demodulator output, which is proportional to the difference between the analog input and the digital output. when it exceeds approximately 100 lsb's (in the selected reso- lution), the bit will be asserted. this condition can occur any time the analog input changes at a rate in excess of the maxi- mum tracking rate. during power up, the converter may see a large difference between the sin/cos inputs and the digital output angle held in its counter. bit will be asserted until the converter settles within 100 lsb's of the final result. 2t b(x- or lsb & lsb+1) a (lsb+1) zip (nrp) 359.95 0 t t figure 3. incremental encoder emulation rd-19230 1 msb 2 3 4 9 10 11 12 13 14 15 bit 16 lsb b 1 0 1 2 1 4 1 6 a 5 6 7 8 figure 2. incremental encoder emulation resolution control on board internal reference oscillator the on board oscillator is available with an optional 1.5va drive. this on board reference oscillator may be looped back to each input channel?s independent reference input. frequency is pro- grammable, and voltage is programmable per the oscillator volt- age range selected. internal incremental optical encoder emulation the card can be programmed to encoder emulation mode (refer to figures 2 and 3). these outputs are available on the p1 connector a, b & zip (which is the zero index pulse). the timing of the a, b output is dependent on the rate of change of the syn- chro/resolver position (rps or degrees per second) and the encoder resolution latched into the converter. dual bandwidths the user can program bandwidth for each input channel inde- pendently through software. the low bandwidth card can be pro- grammed for bandwidths of either 15 or 45hz. the high band- width card can be programmed for bandwidths of either 100 or 300hz.
5 data device corporation www.ddc-web.com sb-36200ix j-11/05-0 s/r signal input configuration configuration for the synchro/resolver inputs is accomplished by the use of specific thin-film resistor networks installed on the card. these networks also scale the input voltage to the convert- er for a choice of either 2v l-l, 11.8v l-l, or 90v l-l synchro/resolver full scale input signal. synchro/resolver-to-digital refer to figure 4 for socket locations on the card. table 4 lists the resistor network and location for each input option. synchro resolver / direct pin 1 pin 1 pin 1 u3 u13 u4 u2 u12 + + u9 c57 c54 t1 u11 + c50 + c52 c73 c70 c51 c59 + c71 + c69 + c74 + c72 tb1 tb3 tb7 tb6 tb2 tb5 tb4 + c91 + c90 + + u10 c65 c61 + c92 + c93 p4 u26 u25 u19 c1 c2 r59 w95 w96 r58 c47 c7 c75 p3 p1 u15 s4 s3 s2 s1 r117 r136 r116 r135 u14 u18 u29 u27 u22 u20 c154 c165 c152 c163 c124 c161 c122 c127 c155 c164 c125 c14 c123 figure 4. input signal configuration input type thin film resistor network table 4. signal input configuration 2v direct ddc - 55688-1 lower sockets location 11.8v resolver ddc - 49530 lower sockets 11.8v synchro ddc - 49530 upper sockets 90v synchro ddc - 49590, 49450* upper sockets *ddc-49450 is a ceramic alternate of the ddc-49590
6 data device corporation www.ddc-web.com sb-36200ix j-11/05-0 s-r/d signal output and d/s-r input configuration the pci bus provides the 16-bit data word (digital angle). the address and data bits are multiplexed. the 16-bit data is avail- able on the bus for hardware or software manipulation via the ad[1-16] lines. the pinouts for a standard 5 v pci bus are shown in table 5. side ?a? and side ?b? of the sb-36200ix card are identified in figure 5. signal connections synchro mode connect s1, s2, s3 s1 = x s2 = z s3 = y resolver mode connect s3 = +sin s1 = -sin s2 = +cos s4 = -cos pin pin side b table 5. (5 v) pci bus pinouts 1 -12v 32 ad[17] side b 2 tck 33 c/be[2]# 3 ground 34 ground 4 tdo 35 irdy# 5 +5v 36 +3.3v 6 +5v 37 devsel# 7 intb# 38 ground 8 intd# 39 lock# 9 prsnt1# 40 perr# 10 reserved 41 +3.3v 11 prsnt2# 42 serr# 12 ground 43 +3.3v 13 ground 44 c/be[1]# 14 reserved 45 ad[14] 15 ground 46 ground 16 clk 47 ad[12] 17 ground 48 ad[10] 18 req# 49 ground 19 +5v (i/o) 50 connector key 20 ad[31] 51 connector key 21 ad[29] 52 ad[08] 22 ground 53 ad[07] 23 ad[27] 54 +3.3v 24 ad[25] 55 ad[05] 25 +3.3v 56 ad[03] 26 c/be[3]# 57 ground 27 ad[23] 58 ad[01] 28 ground 59 +5v (i/o) 29 ad[21] 60 ack64# 30 ad[19] 61 +5v 31 +3.3v 62 +5v side a trst# +12v tms tdi +5v inta# intc# +5v reserved +5v (i/o) reserved ground ground reserved rst# +5v (i/o) gnt# ground reserved ad[30] +3.3v ad[28] ad[26] ground ad[24] idsel +3.3v ad[22] ad[20] ground ad[18] ad[16] side a +3.3v frame# ground trdy# ground stop# +3.3v sdone sbo# ground pa r ad[15] +3.3v ad[13] ad[11] ground ad[09] connector key connector key c/be[0]# +3.3v ad[06] ad[04] ground ad[02] ad[00] +5v (i/o) req64# +5v +5v pci bus connector (side "b") pci bus connector (side "a") pin 1 pin 1 pin 62 pin 62 u3 u13 u4 u2 u12 + + u9 c57 c54 t1 u11 + c50 + c52 c73 c70 c51 c59 + c71 + c69 + c74 + c72 tb1 tb3 tb7 tb6 tb2 tb5 tb4 + c91 + c90 + + u10 c65 c61 + c92 + c93 p4 u26 u25 u19 c1 c2 r59 w95 w96 r58 c47 c7 c75 p3 p1 u15 s4 s3 s2 s1 r117 r136 r116 r135 u14 u18 u29 u27 u22 u20 c154 c165 c152 c163 c124 c161 c122 c127 c155 c164 c125 c14 c123 u24 u23 u17 u16 u5 u6 u7 u8 t2 u21 u28 u1 r55 r54 r53 r52 r41 r40 r37 r49 r36 r35 r42 r44 r43 r38 r34 r31 r28 r27 r26 r25 r24 r29 r30 r33 r32 r22 r23 r21 r19 r18 r16 r13 r12 r8 r17 r15 r14 r2 r1 c5 c56 c53 r79 r77 r76 r78 r75 w80 w94 w81 w93 w82 w85 w83 w84 w74 w73 w91 w98 r88 r86 w97 w92 r89 r87 r65 r68 r71 r69 r72 r70 d1 cr1 d2 d4 d3 q1 r64 r99 r49 c141 c143 w242 w134 w144 w145 w140 w141 w131 w132 w133 c97 c96 r139 c15 c6 c8 c9 c10 c11 c24 c31 c23 c30 c3 c4 c27 c19 c18 c29 r7 r47 r46 r11 r10 r5 r6 r9 r48 r45 c25 c26 c16 c21 c22 c20 c17 r20 c28 c64 c60 r90 c62 c63 c32 c78 c45 c43 c58 c55 c46 c44 c48 r60 r61 r62 c77 c76 r66 r63 r67 w127 w128 w125 w126 w115 w112 w113 w114 c95 c94 r138 r111 r118 r110 r119 r150 r149 r146 r151 r147 r148 r124 r121 r233 r234 r248 r249 r247 r246 r257 r258 r231 r232 r224 r225 r240 r241 r255 r256 r129 r130 r120 r137 r174 r187 r186 r173 r198 r197 r189 r188 r164 r165 r172 r171 r196 r181 r195 r180 r122 r123 c150 c151 c149 c148 r252 r251 r250 w243 w244 w245 c140 c142 w220 c146 c147 c145 c144 r228 r227 r226 w221 w222 w223 c111 c113 w182 c120 c121 c119 c118 r192 r191 r190 w183 w184 w185 c110 c112 w160 c116 c117 c115 c114 r168 r167 r166 w161 w162 w163 r170 r169 r51 r50 r3 r4 c13 c12 c162 c158 c126 figure 5. 5v-pci bus single-ended mode connections - when using 2v single-ended configurations, s1 and s4 on card connector are no-connect. s1 and s4 must be com- monly tied to card ground. s3 to +sin s2 to +cos s1 and s4 common to card ground ground connections - for velocity and single-ended inputs or outputs, reference to agnd. - for a quad b signals, reference to pwr gnd. - for single-ended oscillator, reference to pwr gnd. - for differential oscillator, reference to rl gnd. software software programmable resolutions, in 10, 12, 14 or 16 bit reso- lutions, are attainable. the user can also program bandwidth for each input channel independently through software. the low bandwidth card can be programmed for bandwidths of either 15 or 45hz. the high bandwidth card can be programmed for band- widths of either 100 or 300hz. window gui example software and dos console application example software are included. the provided dll allows the
7 data device corporation www.ddc-web.com sb-36200ix j-11/05-0 pin pin name 1 b-s/d-channel a 35 a-s/d-channel a name 2 zip-s/d-channel a 36 zip-s/d-channel b 3 b-s/d-channel b 37 a-s/d-channel b 4 b-s/d-channel c 38 a-s/d-channel c 5 zip-s/d-channel c 39 zip-s/d-channel d 6 b-s/d-channel d 40 a-s/d-channel d 7 vel-s/d-channel a 41 vel-s/d-channel d 8 vel-s/d-channel b 42 power ground ** 9 vel-s/d-channel c 43 int ref - 115 - rh 10 n/c * 44 agnd-d/r-channel a ** 11 s1-d/r-channel a 45 s3-d/r-channel a 12 s2-d/r-channel a 46 s4-d/r-channel a 13 rl-d/r-channel a 47 rh-d/r-channel a 14 n/c * 48 agnd-d/r-channel b ** 15 s1-d/r-channel b 49 s3-d/r-channel b 16 s2-d/r-channel b 50 s4-d/r-channel b 17 rl-d/r-channel b 51 rh-d/r-channel b 18 n/c * 52 agnd-s/d-channel d ** 19 s1-s/d-channel d 53 s3-s/d-channel d 20 s2-s/d-channel d 54 s4-s/d-channel d 21 rl-s/d-channel d 55 rh-s/d-channel d 22 n/c * 56 agnd-s/d-channel c ** 23 s1-s/d-channel c 57 s3-s/d-channel c 24 s2-s/d-channel c 58 s4-s/d-channel c 25 rl-s/d-channel c 59 rh-s/d-channel c 26 power ground ** 60 agnd-s/d-channel b ** 27 s1-s/d-channel b 61 s3-s/d-channel b 28 s2-s/d-channel b 62 s4-s/d-channel b 29 rl-s/d-channel b 63 rh-s/d-channel b 30 power ground ** 64 agnd-s/d-channel a ** 31 s1-s/d-channel a 65 s3-s/d-channel a 32 s2-s/d-channel a 66 s4-s/d-channel a 33 rl-s/d-channel a 67 rh-s/d-channel a 34 int ref - 26 - rh *** 68 int ref - rl *** user to create custom application software. the software dll provides function calls to control resolution, bandwidth, refer- ence amplitude and reference frequency. this provides access to angular information and can drive dynamic rotation of the output. support is also available for datasims software. contact ddc software applications department for details. card pinouts the card uses one 68-pin mini d connector for input and output connections. the pinouts for the mating connector are shown in table 6 and figure 6. note: all ground returns are connected to the chassis ground. input connections the p1 connector contains all input signal connections for each channel. along with synchro/resolver inputs this connector also contains each channel?s reference input connection for rh/rl. to use the internal board oscillator instead of an outside refer- ence signal, loop back the internal reference signal "rh/rl out" into each specific channel?s reference input. output connections the p1 connector contains the digital-to-synchro/resolver sig- nals as well as velocity and the encoder emulation outputs a, b, notes: * leave pin unconnected. ** all power gnds, d/r-agnd?s and agnd?s are internally connected together to a digital ground reference. *** oscillator option-x will produce 0 - 3.4 vrms output at pins 34 and 68. pin 1 pin 68 pin 1 pin 34 side view of pins 1 thru 34* (solder lug detail) * each side consists of 2 rows of pins. front view (d-connector detail) 11.5 side view (connector shell detail) 41.9 (typ.) 47.08 pin 2 pin 3 pin 32 pin 33 pin 35 pin 34 figure 6. 68-pin d-type mating connector p/n: acon hbw-32-68k3207 (68 pin connector solder plug and junction shell) table 6. sb-36200ix p1 pinouts & zip. (bit is available from a read register accessed on the pci bus.). card has 68-pin connector, n10268-5242vc, mini d rib- bon.
8 data device corporation www.ddc-web.com sb-36200ix j-11/05-0 output option output type 1 11.8v l-l synchro 26 nominal reference input (vrms) 2 11.8v l-l resolver 26 3 11.8v l-l synchro 115 4 2v direct (single ended) 4.4 0.45 multipler x 0.45 0.10 0.455 scaling lower output voltages all output voltages can be scaled down by lowering the required reference input voltage as follows: (where x is the output option ratio multiplier - refer to table 7). reference input voltage = desired output voltage x table 7. reference multiplier (for non-standard d-s/r output voltages) desired output voltage = 9v l-l multiplier x = .45 (for option #1) reference input voltage = 9 v l-l .45 reference input voltage = 20 v example (using an 11.8 volt synchro option 1 card): (note that desired output voltage is lower than the card selection output voltage) oscillator output option # voltage output x 3.4 vrms rh = 34 p1 connector pin table 8. internal reference oscillator outputs rl = 68 a 26 vrms rh = 34 rl = 68 b 115 vrms rh = 43 rl = 68
9 data device corporation www.ddc-web.com sb-36200ix j-11/05-0 top view bottom view d-type connector (p1) chan. 5 chan. 6 pci bus connector u3 u13 u4 u2 u12 + + u9 c57 c54 t1 u11 + c50 + c52 c73 c70 c51 c59 + c71 + c69 + c74 + c72 tb1 tb3 tb7 tb6 tb2 tb5 tb4 + c91 + c90 + + u10 c65 c61 + c92 + c93 p4 u26 u25 u19 c1 c2 r59 w95 w96 r58 c47 c7 c75 p3 p1 u15 s4 s3 s2 s1 r117 r136 r116 r135 u14 u18 u29 u27 u22 u20 c154 c165 c152 c163 c124 c161 c122 c127 c155 c164 c125 c14 c123 u24 u23 u17 u16 u5 u6 u7 u8 t2 u21 u28 u1 r55 r54 r53 r52 r41 r40 r37 r49 r36 r35 r42 r44 r43 r38 r34 r31 r28 r27 r26 r25 r24 r29 r30 r33 r32 r22 r23 r21 r19 r18 r16 r13 r12 r8 r17 r15 r14 r2 r1 c5 c56 c53 r79 r77 r76 r78 r75 w80 w94 w81 w93 w82 w85 w83 w84 w74 w73 w91 w98 r88 r86 w97 w92 r89 r87 r65 r68 r71 r69 r72 r70 d1 cr1 d2 d4 d3 q1 r64 r99 r49 c141 c143 w242 w134 w144 w145 w140 w141 w131 w132 w133 c97 c96 r139 c15 c6 c8 c9 c10 c11 c24 c31 c23 c30 c3 c4 c27 c19 c18 c29 r7 r47 r46 r11 r10 r5 r6 r9 r48 r45 c25 c26 c16 c21 c22 c20 c17 r20 c28 c64 c60 r90 c62 c63 c32 c78 c45 c43 c58 c55 c46 c44 c48 r60 r61 r62 c77 c76 r66 r63 r67 w127 w128 w125 w126 w115 w112 w113 w114 c95 c94 r138 r111 r118 r110 r119 r150 r149 r146 r151 r147 r148 r124 r121 r233 r234 r248 r249 r247 r246 r257 r258 r231 r232 r224 r225 r240 r241 r255 r256 r129 r130 r120 r137 r174 r187 r186 r173 r198 r197 r189 r188 r164 r165 r172 r171 r196 r181 r195 r180 r122 r123 c150 c151 c149 c148 r252 r251 r250 w243 w244 w245 c140 c142 w220 c146 c147 c145 c144 r228 r227 r226 w221 w222 w223 c111 c113 w182 c120 c121 c119 c118 r192 r191 r190 w183 w184 w185 c110 c112 w160 c116 c117 c115 c114 r168 r167 r166 w161 w162 w163 r170 r169 r51 r50 r3 r4 c13 c12 c162 c158 c126 chan. 2 chan. 1 chan. 3 chan. 4 rl rh figure 7. sb-3620x card assembly note: t1 and t2 configuration depend on oscillator type.
10 data device corporation www.ddc-web.com sb-36200ix j-11/05-0 .580 2.473 .074 .573 7.700 3.875 .035 0.40max 0.57max 0.105max 0.57max front back component area front component area applicable to input/output types 0, 1, 2, 4 applicable to input/output type 3 1.025 shown with high voltage safety cover. 0.905max 0.57max applicable to oscillator output type "b" ("b"=1.5 va drive, 115 vrms transformer isolation) t2 shown with high voltage safety cover. 0.40max figure 8. mechanical outline note: hybrid selections 3, 4, 5, 6; oscillator output selection ?b? and input/output type 3 require a 2 slot configuration.
11 data device corporation www.ddc-web.com sb-36200ix j-11/05-0 ordering information sb-3620 x i x -x x x x supplemental process requirements blank = none / n = conformal coat (note 7) hybrid type and accuracy output / input (notes 1 & 9): output (up to 2 channels), input rd-19230 (4-channels pre-installed) output selection / accur acy / p o w er input selection / accur acy 0 = no output converters rd-19230 (1 min + 1 lsb) 1 = dsc-11520-305 (1 min)(2 ma) rd-19230 (1 min + 1 lsb) 5 = dsc-11524-304 (2 min)(15 ma) rd-19230 (1 min + 1 lsb) b = dr-11525-305 (1 min)(2 ma) rd-19230 (1 min + 1 lsb) number of channels: 4 = four channels (synchro/resolver-to-digital) minimum configuration (notes 3 & 4) 5 = five channels (4 channels synchro/resolver-to-digital, 1 channel digital-to-synchro/resolver) (note 5) 6 = six channels (4 channels synchro/resolver-to-digital, 2 channels digital-to-synchro/resolver) (note 5) temperature range: 3 = 0 to +70c oscillator output (note 8): x = 3.4 vrms differential (300 ma max)(note 6) (only available with input/output type 4) a = 1.5 va drive, 26 vrms transformer isolation (60 ma max) b = 1.5 va drive, 115 vrms transformer isolation (13 ma max) input / output type (notes 1, 2): r/d input d/r output ref/f req input osc op req hybr id t ype bw (note 10) 1 = 11.8 vrms l-l synchro 11.8 vrms l-l synchro 26 v (400hz) a 0, 1, 5 100/300 2 = 11.8 vrms l-l resolver 11.8 vrms l-l resolver 26 v (400hz) a 0, 5, b 100/300 3 = 90 vrms l-l synchro 11.8 vrms l-l synchro 115 v (60hz) b 0, 1, 5 15/45 4 = 2 vrms 2 vrms 4.4 v (400hz) a (note 6) 0, b 100/300 notes: 1. see table 1 for accuracy vs. frequency. 2. the 2 v resolver single ended option is available only with dr-11525 converters. for non-standard configurations please contac t ddc or its local representative. for single-ended mode, s1, s4 on the card connector p1 are no connect. use associated analog ground per output channel for s1, s4 re solver outputs used. 3. without a d/r output converter there is no wrap around self-test. 4. for use only with hybrid option 0. 5. not for use with hybrid type option 0. 6. oscillator output option x 3.4 vrms is a low cost option when output voltages of 1.5 vrms or less are needed to be scaled wit h output type 4. 7. for conformal coated boards all components will be soldered down with no sockets. (see manual for detailed hardware/software information) 8. oscillator output is programmable to the maximum voltage of option selection. frequency range is programmable per the table 1 specifications table. 9. see specification table for accuracy over frequency range. 10. card bandwidth: 60hz cards have software programmable bw selections of 15 or 45hz. 400hz cards have software programmable bw s elections of 100 or 300hz. 11. the above products contain tin-lead solder. included accessories: -mating connector -mn36200 hardware/software manual -software (cd format) suggested mating connectors: -ribbon: 3m-10168-6000ec -solder back: acon-hbw32-68k3207 ? ddc atp electrical test class 3 ipc-a-610 inspection / workmanship condition(s) method(s) test standard ddc processing for discrete modules/pc board assemblies
12 j-11/05-0 printed in the u.s.a. data device corporation registered to iso 9001:2000 file no. a5976 r e g i s t e r e d f i r m ? u 105 wilbur place, bohemia, new york 11716-2482 for technical support - 1-800-ddc-5757 ext. 7771 headquarters, n.y., u.s.a. - tel: (631) 567-5600, fax: (631) 567-7358 southeast - tel: (703) 450-7900, fax: (703) 450-6610 west coast - tel: (714) 895-9777, fax: (714) 895-4988 united kingdom - tel: +44-(0)1635-811140, fax: +44-(0)1635-32264 ireland - tel: +353-21-341065, fax: +353-21-341568 france - tel: +33-(0)1-41-16-3424, fax: +33-(0)1-41-16-3425 germany - tel: +49-(0)89-15 00 12-11, fax: +49-(0)89-15 00 12-22 japan - tel: +81-(0)3-3814-7688, fax: +81-(0)3-3814-7689 world wide web - http://www.ddc-web.com the information in this data sheet is believed to be accurate; however, no responsibility is assumed by data device corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. specifications are subject to change without notice. please visit our web site at www.ddc-web.com for the latest information. data device corporation registered to iso 9001:2000 file no. a5976 r e g i s t e r e d f i r m ? u

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